Section 5            RealityEngine Graphics Subsystem

5.1 Introduction

RealityEngine is the latest evolution of the most advanced line of binary-compatible
graphics systems in history.  Combined with the Silicon Graphics symmetric
multiprocessing (SMP) architecture for 32-bit and 64-bit RISC CPUS, RealityEngine
boasts supercomputer performance for general purpose computation with
unparalleled graphics performance and features for interactive realism.  RealityEngine
was designed to push the edge of graphics and compute technology, opening up new
possibilities for such applications as low-cost image generation and simulation,
digital film and video production, virtual reality, and scientific visualization.

5.2 Graphics

Incorporating the latest evolution of Silicon Graphics'Geometry Pipeline architecture,
RealityEngine is the most advanced general purpose graphics system in the world.  To
ensure compatibility between RealityEngine and other systems both in and outside of
the Silicon Graphics product line, the graphics hardware is accessed through the IRIS
Graphics Library(tm) (GL), developed by Silicon Graphics to provide a standard user
interface for the development of 3D graphics applications.

RealityEngine represents the third generation of Silicon Graphics Geometry Pipeline

TABLE 1 Graphics Architecture History
1st Generation Flat Shaded 1000,2000,3000,G
2nd Generation Lighted, Smooth Shaded, Z-Buffered GT,GTX,VGX
3rd Generation Lighted, Smooth Shadded, Z-Buffered, Textured, Anti-Aliased, Fogged RealityEngine

The basic graphics subsystem comprises three unique boards, the Geometry Engine,
the Raster Manager, and the Display Generator.  Applications requiring more
advanced capabilities or higher performance can increase both pixel resolution and
processing power by the use of as many as four Raster Managers.

Data in the graphics pipeline is processed in stages, from the initial GL subroutine
calls in the CPU, across the MPLink bus, through the pipeline, to the final analog or
digital video output.  The process begins in the CPU, where the application has the
option of sending data to the graphics subsystem in immediate mode or display list mode.
In immediate mode, new data is constantly sent across the bus to the graphics
pipeline, with no necessary correlation between the data sent down from one
viewable frame to the next.